Samsung RT55EANS Especificações descarregar pdf (Página 126)

126 Intel

Atom™ processor CE4100 Ref# 420826

Platform Design Guide

Intel Confidential

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The High Definition Video Capture (HDVCAP) unit is capable of real-time capturing of digital

component video that complies with three industry-accepted standards for digital video

interfaces. These include EIA/CEA-861-D, ITU-R BT.656-4 and ITU-R BT.1120-5.

In addition, 8-bit, 10-bit and 12-bit YCbCr and RGB are supported. Please refer to the

EIA/CEA-861-D standard for a complete description of the resolutions and timing. There is

no support for frame rate timing greater than 60Hz.

9.1 HDVCAP Signals Interface

The High Definition Video Capture Interface is comprised of a 36-pin video component data

interface, a 3-pin video sync interface, and a 1-pin video interface clock.

A, B and C. The PAD_HDVCAP_PD_A/B/C[1:11] are mapped to DVDATA[35:0]. The HDVCAP

front end has video/sync steering to allow define each of the channels.

Figure 9-1. HDVCAP Block Diagram

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