Samsung M378T5663EH3-CE6 Ficha Técnica

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 1 of 25DDR2 Unbuffered SDRAM MODULE240pin Unbuffered Module based on 1Gb E-die64/72-bit Non-ECC/ECC60FBGA &

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 10 of 25S0DQS0DQS0DM0DM CS DQS DQSDQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7D0DQS1DQS1DM1D

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 11 of 25S0DQS0DQS0DM0DM CS DQS DQSDQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7D0DQS1DQS1DM1D

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 12 of 25S0DQS1DQS1DM1CSDQ8DQ9DQ10DQ11DQ12DQ13DQ14DQ15I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7D0Notes : 1. DQ,DM,

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 13 of 25 Note : There is no specific device VDD supply voltage requirement for SSTL-1.8 compliance. However unde

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 14 of 25 Notes: 1. Input waveform timing is referenced to the input signal crossing through the VIH/IL(AC) level

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 15 of 25(IDD values are for full operating range of Voltage and Temperature)Symbol Proposed Conditions Units Not

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 16 of 2512.1 M378T2863EHS : 1GB(128Mx8 *8) Module12.2 M378T5663EH3 : 2GB(128Mx8 *16) Module(TA=0oC, VDD= 1.9V)

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 17 of 2512.4 M391T5663EH3 : 2GB(128Mx8 *18) ECC Module(TA=0oC, VDD= 1.9V)* Module IDD was calculated on the bas

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 18 of 25(TA=0oC, VDD= 1.9V)* Module IDD was calculated on the basis of component IDD and can be differently me

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 19 of 25(VDD=1.8V, VDDQ=1.8V, TA=25oC)Note : DM is internally loaded to match DQ and DQS identically.ParameterSy

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 2 of 25Table of Contents1.0 DDR2 Unbuffered DIMM Ordering Information ...

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 20 of 25(Refer to notes for informations related to this table at the component datasheet)Parameter SymbolDDR2-8

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 21 of 25Parameter SymbolDDR2-800 DDR2-667UnitsNotesmin max min maxFour Activate Window for 1KB page size product

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 22 of 25Units : MillimetersThe used device is 128M x8 DDR2 SDRAM, FBGA.DDR2 SDRAM Part NO : K4T1G084QE2.501.000.

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 23 of 25Units : MillimetersThe used device is 128M x8 DDR2 SDRAM, FBGA.DDR2 SDRAM Part NO : K4T1G084QE2.501.000.

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 24 of 252.50131.35Units : Millimeters133.3510.00128.95(2)2.50(2X)4.002.3017.80The used device is 128M x8 DDR2 SD

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 25 of 25131.35133.3510.00128.95(2)2.50(2X)4.0030.002.3017.80SPD1.270 ± 0.102.7The used device is 64M x16 DDR2 SD

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 3 of 25Revision HistoryRevision Month Year History1.0 August 2008 - Initial Release1.01 October 2008 - Typo co

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 4 of 251.0 DDR2 Unbuffered DIMM Ordering Information2.0 FeaturesNote : 1. “H” of Part number(12th digit) stands

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 5 of 25NC = No Connect, RFU = Reserved for Future Use1. Pin196(A13) is used for x4/x8 base Unbuffered DIMM. 2.

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 6 of 25NC = No Connect, RFU = Reserved for Future Use1. Pin196(A13) is used for x4/x8 base Unbuffered DIMM. 2.

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 7 of 25Symbol Type DescriptionCK0-CK2CK0-CK2InputCK and CK are differential clock inputs. All the SDRAM addr/cnt

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 8 of 25S0DQS0DQS0DM0DM CS DQS DQSDQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7D0DQS1DQS1DM1DM

Rev. 1.02 October 2008UDIMMDDR2 SDRAM 9 of 25S0DQS0DQS0DM0DM CS DQS DQSDQ0DQ1DQ2DQ3DQ4DQ5DQ6DQ7I/O 0I/O 1I/O 2I/O 3I/O 4I/O 5I/O 6I/O 7D0DQS1DQS1DM1DM